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RTL Engineer, Networking ASIC

  • On-site
    • San Jose, California, United States
  • $150,000 - $180,000 per year
  • Information Technology

RTL Engineer, Networking ASIC | San Jose, CA | Design high-speed AI networking ASICs. Strong RTL, SystemVerilog, Verilog, QoS, Ethernet/IP protocols, and ASIC design experience required.

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Questions

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Are you a U.S. Citizen or Green Card holder? Please respond Yes or No!
Are you authorized to work in the U.S. without current or future sponsorship?
Are you willing to work onsite in San Jose, CA?
Do you have a BE/ME degree in Electrical Engineering, Computer Engineering, or a related field?
Do you have 8+ years of hands-on RTL design experience for ASIC development?
Do you have strong hands-on experience with SystemVerilog and Verilog?
Do you have experience designing high-speed networking ASICs or networking hardware?
Do you have experience with packet buffering, queuing, scheduling, arbitration, or QoS mechanisms?
Do you have a solid understanding of ASIC design methodologies including simulation, verification, synthesis, and timing closure?
Do you have experience with Ethernet and IP networking protocols?
Do you have experience working with on-chip memory subsystems in ASIC designs?
Have you worked closely with verification teams to validate and debug ASIC designs?
Do you have experience troubleshooting and debugging complex networking hardware issues?